The present invention relates generally to spread spectrum communication systems and equalization processing, and more particularly to a digital equalizer and equalizing methods for use with spread spectrum communication systems having a dispersive channel, and other systems that process signals having a sufficient degree of redundancy in time and/of phase.
The classical equalization processing is based on the concept of a RAKE receiver developed in the 1950's. The conventional technique for equalization uses a transversal filter, comprising a tapped delay line with adaptive weighting circuitry. Such classical equalizers, sometimes called transversal equalizers, consist of a tapped delay line, and a set weighting multipliers and a combiner. The outputs at the delays are weighted and then combined to align the time and phase to produce the desired signal, based on some training signal. The processing is thus performed on signal chip level. Such a transversal filter/equalizer requires complex analog or digital circuitry and extensive processing. Estimation of the weightings is the key issue in classical transversal equalizers, since the complexity of the equalizer increases in proportion to the square of the number of taps in the delay line. For a spread spectrum system operated in a large multipath spread, the equalizer complexity can become overwhelming. Very high speed processors must be used, or the equalizers can only support low data rates and narrowband signals with low processing gain.
It is therefore an objective of the present invention is to replace an analog tap delay line equalizer or a digital implementation of a transversal equalizer with a simpler, all digital microprocessor based equalizer. The present invention is particularly important in developing cost effective receivers in wideband spread spectrum receivers where analog component drifts result in large implementation losses.